Self-Sensing Processor Systems: Variation Mitigation for High-Performance and Efficiency in Ultra-Scaled Technologies Video
IEEE Members: $8.00
Non-members: $15.00Length: 1:16:07
21 Dec 2023
Abstract: Modern cloud-native and machine-learning applications place stringent computational demands on high-performance compute systems. Traditionally, this relentless demand for high-performance has been met through technology-scaling. Continual innovations in transistor technology have enabled ever-greater integration opportunities leading to generational gains in system-performance. Undesirably, this has also been at the expense of worsening susceptibilities to process and ambient variations that adversely impact system efficiency. Simultaneously satisfying the often-conflicting objectives of high-performance and energy-efficient computing, particularly in the face of rising variations has driven the need for self-sensing processor systems. Unlike traditional compute systems, self-sensing systems do not operate under fixed voltage and frequency conditions, rather they monitor their immediate process and ambient environment and rely upon adaptation mechanisms to maximize efficiency at a given performance level. In this webinar, we will address the need for self-sensing systems by examining the nature of variations in ultra-scaled process technologies and how they impact design guardbands and hence system-efficiency. We will discuss how self-sensing systems use sensors to monitor their ambient environment and discuss the design of these sensors highlighting key references in the published literature. We will present how environment adaptation is actuated using a combination of power-delivery and clocking techniques. We also present an alternative approach to self-sensing design where instead of explicit variation-sensors, timing-error detectors on critical-paths are used to tune the operating point. We highlight specific examples from academic and industrial research that showcases this concept, both for general-purpose and domain-specific computing.