Basics of Adaptive and Resilient Circuits Slides and Transcript

Abstract - Dynamic device and circuit parameter variations degrade processor performance, energy efficiency, yield, and reliability across all market segments, ranging from small embedded cores in an IoT to large multicore servers. This tutorial introduces the primary variations during a processor’s operational lifetime, including transient voltage droops, temperature changes, and radiation-induced soft errors, as well as persistent transistor and interconnect aging. This presentation then describes the negative impact of these variations on timing and data retention in logic and embedded memory across a wide range of voltages and clock frequencies. To mitigate these adverse effects from dynamic variations, this tutorial presents adaptive and resilient circuits, while highlighting the key design trade-offs and testing implications for product deployment.
Bio - Keith Bowman is a Principal Engineer and Manager in the Processor Research Team at Qualcomm Technologies, Inc. in Raleigh, NC. He pioneered the invention, design, and test of Qualcomm’s first commercially successful circuit for mitigating the adverse effects of supply voltage droops. He received the Ph.D. degree from the Georgia Institute of Technology and worked at Intel for 12 years. He has published over 70 technical conference and journal papers and presented over 30 tutorials on variation-tolerant circuit designs. He currently serves on the ISSCC technical program committee.