Successive Approximation, SAR, ADCs have received an increasing amount of interest in the past decade, covering a broad range of specifications and applications. Large contributors to their success are their inherent power efficiency, simplicity of design, and process scalability. In particular, this webinar covers the design of low power SAR ADCs, suitable for the Internet of Things, wearable sensors, and other low power applications. Being on the border between analog and digital domains, the optimization of SAR ADCs has challenges and opportunities on both sides, giving ample room for creative solutions at various levels. This talk starts with an overview of possibilities at circuit, layout, architecture and algorithm levels covering all of the components in a SAR ADC. Examples from literature are used for illustration. Next, the talk will discuss practical SAR ADC implementations in detail, emphasizing the techniques being used to boost the ADCs efficiency and resolution. The talk concludes with an outlook regarding limitations as well as future challenges and opportunities. Presenter Biography Pieter Harpe, SM 15, received the M.Sc. and Ph.D. degrees from the Eindhoven University of Technology, The Netherlands, in 2004 and 2010, respectively. From 2008 to 2011, he was a researcher at Holst Centre imec, The Netherlands, where he worked on ultra low power wireless transceivers, with a main focus on ADC research and design. In April 2011, he joined Eindhoven University of Technology where he is currently an Associate Professor on low power mixed signal circuits. Dr. Harpe is co organizer of the yearly workshop on Advances in Analog Circuit Design, AACD, and TPC member for ESSCIRC, where he chairs the analog track. He also served as TPC member for ISSCC, was IEEE Solid-State Circuits Society Distinguished Lecturer in 2016 and 2017, and is recipient of the ISSCC 2015 Distinguished Technical Paper Award.
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