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  • SSCS
    Members: Free
    IEEE Members: $10.00
    Non-members: $20.00
    Pages/Slides: 98
16 Feb 2020

Abstract: In recent years, time-interleaving analog-to-digital converters (ADCs) have become more popular, especially for high sample rate applications such as wireline communications. This tutorial will cover the fundamentals of timeinterleaved sampling, including an introduction to aliasing and an explanation of how mismatch in time-interleaved architectures can cause aliasing artifacts to appear. Practical methods to implement time-interleaved ADCs and combat these mismatch-induced effects will also be presented.

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